For this exam, you may use your textbook, your notes and assignments, your brain, the Math/CS computers, and divine inspiration (if any is available to you). If you get stuck, talk to Jeff Ondich, but please don't talk to anyone else about the exam.
Explain and justify your answers. Submit your answers on paper.
Show me the code you use to answer these questions.
add $2, $3, $4 beq $2, $5, 96 lw $6, 192($7) subi $6, $6, 24
Suppose the subi instruction has been fetched (that is, it is now stored in the IF/ID pipeline register), and the clock is about to fall again (that is, the current clock cycle has gone on long enough that all of the elements of the datapath have completed their work for this cycle). As completely as you can, show the values stored in all the pipeline registers (including the saved control values), and on all the lines.
You may assume that the contents of each register ($0 through $31)
started out as triple the register number (so register 1 contains a 3,
register 2 contains a 6, etc.). You may also assume that no register
writes have occurred as the add instruction has made its way through
the pipeline.
For each of these caches, answer the following questions.
52, 13, 79, 57, 86, 12, 84, 14, 21, 102, 36, 25, 33, 26, 34, 98, 76, 38
Note that these addresses are byte addresses--so byte 3 is contained in the word starting at address 0. Also, indicate a word by writing out its byte range (so the word starting at address 52, for example, would be written as "52-55").