This is a an exam. You may consult your notes, any book, and the Internet. You may not speak with any person other than Jeff Ondich, electronically or otherwise, about the content of this exam. If you obtain relevant information from any source other than yourself, cite your sources clearly. Justify your answers. (Note that "justify your answers" implies "show your work.") Have fun.
Integers (8 points)
Instruction sets (10 points)
Suppose you wanted to modify the PDP-8 instruction set to add two new memory reference addressing modes: pre-decrement and post-increment. (This would bring the total number of addressing modes to four: direct, indirect, pre-decrement, and post-increment.) Pre-decrement would work exactly like indirect addressing, but would decrement the pointer address before using it. For example:
Before After ============================ ============================ AC = ???? AC = 0003 0200 START, CLA 0200 START, CLA 0201 TAD PREDEC PTR 0201 TAD PREDEC PTR 0202 HLT 0202 HLT 0203 PTR, 0301 0203 PTR, 0300 ... ... 0300 0003 0300 0003 0301 0005 0301 0005
POSTINC would work similarly, but would increment the pointer after using it.
Performance (8 points). Do problem 4.10 from the textbook.
Free points (2 points). I just finished a book. What should I read next?
Digital Logic (10 points)
Consider the following boolean function of three variables:
A B C | Out ================= 0 0 0 | 0 0 0 1 | 1 0 1 0 | 0 0 1 1 | 1 1 0 0 | 1 1 0 1 | 1 1 1 0 | 0 1 1 1 | 1
Figures B.8.4 and B.8.5 show the construction and timing of a memory element triggered by the falling edge of the clock. Show how you would modify the circuit in figure B.8.4 to trigger the flip-flop by the rising edge of the clock. Also, show a modified version of figure B.8.5 to illustrate the triggering behavior of your modified flip-flop.