This is an exam. If you have questions, you may consult books, the Internet, or Jeff Ondich, but not anybody else. Have fun.
(10 points) Consider the following caches, each of which can hold up to thirty-two 32-bit words of data. Assume that addresses are 32 bits long.
For each of these caches, answer the following questions.
Draw a diagram of the cache. How many bytes of memory does it use?
If the contents of the following addresses are requested in the indicated order, what words are in which entries at the end, and what is the hit ratio? Assume the cache starts out empty.
10, 50, 36, 129, 76, 60, 170, 32 106, 172, 12, 40, 131
Notes: (1) These addresses are byte addresses--so byte 3 is contained in the word starting at address 0. (2) Please indicate a word by writing out its byte range (so the word starting at address 52, for example, would be written as "52-55", and the four-word block starting at address 32 would be "32-47"). (3) These hit ratios are very low, both because the caches start out empty, and because I have made no effort to make my numbers adhere to the principles of spacial or temporal locality.
(10 points) Consider the datapath shown in Figure 5.33. Show how you would modify this datapath to enable it to support the BNE instruction. Would you need to modify the control as well? If not, why not? If so, how?
(10 points) Do problem 6.9 on page 530 of Patterson and Hennessy.
(3 points) Please tell me a joke.
(16 points) John von Neumann's "First Draft of a Report on the EDVAC." I will give you a copy of the first ten pages of von Neumann's report on Wednesday in class. Read it and answer the following questions.
Patterson and Hennessy discuss von Neumann's report in Chapter 1 of your textbook. They note that the report was one of several things that attorneys used to break the Mauchly/Eckert patent on the computer. What besides this report was relevant in the patent case?
Who besides von Neumann deserves credit for this report?
Throughout the report, von Neumann refers to the main subdivisions of a computing system as CA, CC, I, O, R, and M. To what modern concepts do these six subdivisions refer?
Section 1.2 refers to several mechanisms by which program instructions may be stored. Name a mechanism used in modern computing systems that is not contained in von Neumann's list.
There is a sentence in section 2.9 that begins with "As to (h) (sorting and statistics), the situation is somewhat ambiguous...." This sentence hints at the subject of one of the chapters in Patterson and Hennessy. Which chapter?
Summarize von Neumann's arguments in favor of binary rather than decimal computation. Are these arguments still valid?
Why does von Neumann like vacuum tubes? (Vacuum tubes, by the way, are devices that can be used to perform switching operations like those done by transistors. Thus, you could build gates out of vacuum tubes. Vacuum tubes tended to burn out like light bulbs do, so it was common for drug stores and hardware stores to sell them. When I was a kid, our neighborhood drug store had a kiosk where you could bring in a burnt-out tube and stick it into the plugs on the kiosk to figure out which replacement tube would work. This was necessary if you wanted your TV to keep working.)
Consider the last paragraph of section 5.6. In what ways is von Neumann's advice still valid, and in what ways is it not?
(10 points) Read this review of the Celeron 2.0 GHz chip at Tom's Hardware Guide, and answer the following questions. Note that the article stretches on to several pages so Tom can bludgeon you with advertisements.
The first paragraph of this article says that the Celeron and Pentium 4 are based on the same architecture. So why doesn't the Celeron perform as well as Pentium 4's at the same clock speed?
What are µOPs?
By the early 90's, Intel was in trouble because RISC research was showing that simplified instruction sets could lead to very fast machines, but Intel still needed to support old code using the very complex x86 instruction set. Explain how µOPs represent a solution to this dilemma.
What is an Execution Trace Cache, and why is it preferable to the Pentium III's L1 instruction cache?
The Rapid Execution Engine makes some ALUs faster than the less-rapid ALUs. How?
Have a great break.